Nowadays, multi-core processors are widely used across many application domains including general-purpose, embedded, network, digital signal processing and graphics. The main idea of this work was to develop a simulation and evaluation framework for many-core architectures. The simulation and evaluation framework was developed in Java programming language and can support different architecture topologies such as Mesh and Torus Architectures. Added to this different traffic patterns were developed (Random, Tornado, Transpose, Neighbour Traffic Patterns) in order to evaluate different architectures. New intelligent Artificial Neural Network (ANN) algorithms were introduced in order to minimize the power consumption in Networks on Chips. Based on an optimal threshold which was computed with the use of ANNs it was possible to minimize the power consumption in NoCs by turning on/off links and router ports which are underutilized.
The project is part financed by the Cyprus Research Promotion Foundation’s Framework Programme for Research, Technological Development and Innovation 2008 (DESMI 2008), co-funded by the Republic of Cyprus and the European Regional Development Fund, and specifically under Grant DIDAKTOR/DISEK/0308/20.